Add IDE/ATA disk driver with devicefs integration
Implement PIO-mode IDE driver that scans primary and secondary channels for ATA hard drives and ATAPI CD/DVD drives using IDENTIFY commands. Features: - Scans 4 possible devices (2 channels x 2 drives each) - ATA IDENTIFY DEVICE for hard drives - ATAPI IDENTIFY PACKET DEVICE for CD/DVD drives - PIO-mode 28-bit LBA sector read/write for ATA drives - Model string extraction and sector count parsing - Registers as kernel driver via REGISTER_DRIVER macro - Registers devices with devicefs: ATA → hdd class, ATAPI → cd class - Added inw/outw to port_io.h for 16-bit I/O Tested: QEMU detects hdd1 (QEMU HARDDISK) and cd1 (QEMU DVD-ROM).
This commit is contained in:
AI
@@ -20,6 +20,7 @@ add_executable(kernel
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vfs.c
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initrd_fs.c
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devicefs.c
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ide.c
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env.c
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keyboard.c
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interrupts.S
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390
src/ide.c
Normal file
390
src/ide.c
Normal file
@@ -0,0 +1,390 @@
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/**
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* @file ide.c
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* @brief IDE/ATA disk driver implementation.
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*
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* Probes the primary and secondary IDE channels for ATA hard drives and
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* ATAPI CD/DVD drives using PIO-mode IDENTIFY commands. Detected devices
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* are registered with the devicefs subsystem as block devices:
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* - ATA drives → "hdd" class (hdd1, hdd2, ...)
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* - ATAPI drives → "cd" class (cd1, cd2, ...)
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*
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* Supports PIO-mode sector reads and writes using 28-bit LBA addressing,
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* which covers drives up to 128 GiB.
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*/
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#include "ide.h"
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#include "port_io.h"
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#include "devicefs.h"
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#include "driver.h"
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#include <string.h>
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/* Debug print helpers defined in kernel.c */
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extern void offset_print(const char *str);
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extern void print_hex(uint32_t val);
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/** All detected IDE devices. */
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static ide_device_t ide_devices[IDE_MAX_DEVICES];
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/* ================================================================
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* Low-level IDE I/O helpers
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* ================================================================ */
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/**
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* Wait for the BSY flag to clear on the given channel.
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* Returns the final status byte, or 0xFF on timeout.
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*
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* @param io_base Channel I/O base port.
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* @return Status byte.
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*/
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static uint8_t ide_wait(uint16_t io_base) {
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uint8_t status;
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int timeout = 100000;
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do {
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status = inb(io_base + IDE_REG_STATUS);
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if (--timeout == 0) return 0xFF;
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} while (status & IDE_STATUS_BSY);
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return status;
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}
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/**
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* Wait for BSY to clear and DRQ to set (data ready).
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* Returns 0 on success, -1 on timeout or error.
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*
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* @param io_base Channel I/O base port.
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* @return 0 on success, -1 on error/timeout.
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*/
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static int ide_wait_drq(uint16_t io_base) {
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uint8_t status;
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int timeout = 100000;
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do {
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status = inb(io_base + IDE_REG_STATUS);
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if (status & (IDE_STATUS_ERR | IDE_STATUS_DF)) return -1;
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if (--timeout == 0) return -1;
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} while ((status & (IDE_STATUS_BSY | IDE_STATUS_DRQ)) != IDE_STATUS_DRQ);
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return 0;
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}
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/**
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* Read 256 16-bit words (512 bytes) from the data register.
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*
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* @param io_base Channel I/O base port.
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* @param buf Destination buffer (must be at least 512 bytes).
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*/
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static void ide_read_buffer(uint16_t io_base, uint16_t *buf) {
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for (int i = 0; i < 256; i++) {
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buf[i] = inw(io_base + IDE_REG_DATA);
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}
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}
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/**
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* Write 256 16-bit words (512 bytes) to the data register.
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*
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* @param io_base Channel I/O base port.
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* @param buf Source buffer (must be at least 512 bytes).
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*/
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static void ide_write_buffer(uint16_t io_base, const uint16_t *buf) {
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for (int i = 0; i < 256; i++) {
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outw(io_base + IDE_REG_DATA, buf[i]);
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}
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}
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/**
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* Perform a software reset on an IDE channel.
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*
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* @param ctrl_base Channel control port.
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*/
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static void ide_soft_reset(uint16_t ctrl_base) {
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outb(ctrl_base, 0x04); /* Set SRST bit */
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/* Wait ~5 µs (several I/O reads) */
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for (int i = 0; i < 4; i++) inb(ctrl_base);
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outb(ctrl_base, 0x00); /* Clear SRST bit */
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/* Wait for BSY to clear */
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for (int i = 0; i < 4; i++) inb(ctrl_base);
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}
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/**
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* Select a drive on a channel (master=0, slave=1).
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*
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* @param io_base Channel I/O base port.
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* @param drive 0 for master, 1 for slave.
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*/
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static void ide_select_drive(uint16_t io_base, uint8_t drive) {
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outb(io_base + IDE_REG_DRIVE_HEAD, 0xA0 | (drive << 4));
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/* Wait ~400 ns by reading status 4 times */
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for (int i = 0; i < 4; i++) inb(io_base + IDE_REG_STATUS);
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}
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/* ================================================================
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* IDENTIFY command
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* ================================================================ */
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/**
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* Send IDENTIFY (or IDENTIFY PACKET) to a drive and read the result.
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*
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* @param dev Pointer to the device descriptor to fill.
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* @return 0 on success, -1 if no device or error.
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*/
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static int ide_identify(ide_device_t *dev) {
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uint16_t io = dev->io_base;
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/* Select the drive */
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ide_select_drive(io, dev->drive);
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/* Clear sector count and LBA registers */
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outb(io + IDE_REG_SECCOUNT, 0);
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outb(io + IDE_REG_LBA_LO, 0);
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outb(io + IDE_REG_LBA_MID, 0);
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outb(io + IDE_REG_LBA_HI, 0);
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/* Send IDENTIFY command */
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outb(io + IDE_REG_COMMAND, IDE_CMD_IDENTIFY);
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/* Read status — if 0, no device */
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uint8_t status = inb(io + IDE_REG_STATUS);
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if (status == 0) return -1;
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/* Wait for BSY to clear */
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status = ide_wait(io);
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if (status == 0xFF) return -1;
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/* Check if this is an ATAPI device (LBA_MID/HI will be non-zero) */
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uint8_t lba_mid = inb(io + IDE_REG_LBA_MID);
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uint8_t lba_hi = inb(io + IDE_REG_LBA_HI);
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if (lba_mid == 0x14 && lba_hi == 0xEB) {
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/* ATAPI device — re-identify with IDENTIFY PACKET DEVICE */
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dev->type = IDE_TYPE_ATAPI;
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outb(io + IDE_REG_COMMAND, IDE_CMD_IDENTIFY_PKT);
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status = ide_wait(io);
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if (status == 0xFF) return -1;
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} else if (lba_mid == 0 && lba_hi == 0) {
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dev->type = IDE_TYPE_ATA;
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} else {
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/* Unknown device type */
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return -1;
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}
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/* Wait for DRQ */
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if (ide_wait_drq(io) != 0) return -1;
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/* Read 256 words of identification data */
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uint16_t identify_buf[256];
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ide_read_buffer(io, identify_buf);
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/* Parse model string (words 27-46, each word is big-endian) */
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for (int i = 0; i < 20; i++) {
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dev->model[i * 2] = (char)(identify_buf[27 + i] >> 8);
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dev->model[i * 2 + 1] = (char)(identify_buf[27 + i] & 0xFF);
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}
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dev->model[40] = '\0';
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/* Trim trailing spaces */
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for (int i = 39; i >= 0; i--) {
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if (dev->model[i] == ' ') dev->model[i] = '\0';
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else break;
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}
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/* Parse sector count (28-bit LBA: words 60-61) */
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if (dev->type == IDE_TYPE_ATA) {
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dev->sector_count = (uint32_t)identify_buf[60] |
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((uint32_t)identify_buf[61] << 16);
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dev->sector_size = 512;
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} else {
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/* ATAPI: sector count from READ CAPACITY, default to 0 */
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dev->sector_count = 0;
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dev->sector_size = 2048; /* Standard CD sector size */
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}
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dev->present = 1;
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return 0;
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}
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/* ================================================================
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* Block device operations (for devicefs)
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* ================================================================ */
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/**
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* Read sectors from an ATA drive using PIO.
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*/
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static int ide_block_read(void *dev_data, uint32_t lba,
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uint32_t count, void *buf) {
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ide_device_t *dev = (ide_device_t *)dev_data;
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if (!dev || dev->type != IDE_TYPE_ATA) return -1;
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uint16_t io = dev->io_base;
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uint8_t *dest = (uint8_t *)buf;
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for (uint32_t s = 0; s < count; s++) {
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uint32_t cur_lba = lba + s;
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/* Select drive with LBA mode and top 4 LBA bits */
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outb(io + IDE_REG_DRIVE_HEAD,
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0xE0 | (dev->drive << 4) | ((cur_lba >> 24) & 0x0F));
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/* Set sector count = 1 and LBA */
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outb(io + IDE_REG_SECCOUNT, 1);
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outb(io + IDE_REG_LBA_LO, cur_lba & 0xFF);
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outb(io + IDE_REG_LBA_MID, (cur_lba >> 8) & 0xFF);
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outb(io + IDE_REG_LBA_HI, (cur_lba >> 16) & 0xFF);
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/* Send READ SECTORS command */
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outb(io + IDE_REG_COMMAND, IDE_CMD_READ_PIO);
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/* Wait for data */
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if (ide_wait_drq(io) != 0) return -1;
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/* Read 256 words (512 bytes) */
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ide_read_buffer(io, (uint16_t *)(dest + s * 512));
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}
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return 0;
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}
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/**
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* Write sectors to an ATA drive using PIO.
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*/
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static int ide_block_write(void *dev_data, uint32_t lba,
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uint32_t count, const void *buf) {
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ide_device_t *dev = (ide_device_t *)dev_data;
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if (!dev || dev->type != IDE_TYPE_ATA) return -1;
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uint16_t io = dev->io_base;
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const uint8_t *src = (const uint8_t *)buf;
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for (uint32_t s = 0; s < count; s++) {
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uint32_t cur_lba = lba + s;
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outb(io + IDE_REG_DRIVE_HEAD,
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0xE0 | (dev->drive << 4) | ((cur_lba >> 24) & 0x0F));
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outb(io + IDE_REG_SECCOUNT, 1);
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outb(io + IDE_REG_LBA_LO, cur_lba & 0xFF);
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outb(io + IDE_REG_LBA_MID, (cur_lba >> 8) & 0xFF);
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outb(io + IDE_REG_LBA_HI, (cur_lba >> 16) & 0xFF);
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outb(io + IDE_REG_COMMAND, IDE_CMD_WRITE_PIO);
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if (ide_wait_drq(io) != 0) return -1;
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ide_write_buffer(io, (const uint16_t *)(src + s * 512));
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/* Flush cache: wait for BSY to clear after write */
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ide_wait(io);
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}
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return 0;
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}
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/**
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* Return sector size for a device.
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*/
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static uint32_t ide_block_sector_size(void *dev_data) {
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ide_device_t *dev = (ide_device_t *)dev_data;
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return dev ? dev->sector_size : 512;
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}
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/**
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* Return total sector count for a device.
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*/
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static uint32_t ide_block_sector_count(void *dev_data) {
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ide_device_t *dev = (ide_device_t *)dev_data;
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return dev ? dev->sector_count : 0;
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}
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/** Block operations for ATA/ATAPI devices. */
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static devicefs_block_ops_t ide_block_ops = {
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.read_sectors = ide_block_read,
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.write_sectors = ide_block_write,
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.sector_size = ide_block_sector_size,
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.sector_count = ide_block_sector_count,
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};
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/* ================================================================
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* Driver probe and init
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* ================================================================ */
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/**
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* Probe: always return OK since IDE ports are standard.
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*/
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static driver_probe_result_t ide_probe(void) {
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return DRIVER_PROBE_OK;
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}
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/**
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* Initialize the IDE driver: scan channels and register devices.
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*/
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static int ide_driver_init(void) {
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memset(ide_devices, 0, sizeof(ide_devices));
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/* Channel definitions: primary (0x1F0, 0x3F6), secondary (0x170, 0x376) */
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static const uint16_t io_bases[2] = { IDE_PRIMARY_IO, IDE_SECONDARY_IO };
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static const uint16_t ctrl_bases[2] = { IDE_PRIMARY_CTRL, IDE_SECONDARY_CTRL };
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int found = 0;
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for (int ch = 0; ch < 2; ch++) {
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/* Software reset the channel */
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ide_soft_reset(ctrl_bases[ch]);
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for (int drv = 0; drv < 2; drv++) {
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int idx = ch * 2 + drv;
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ide_devices[idx].channel = (uint8_t)ch;
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ide_devices[idx].drive = (uint8_t)drv;
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ide_devices[idx].io_base = io_bases[ch];
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ide_devices[idx].ctrl_base = ctrl_bases[ch];
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ide_devices[idx].present = 0;
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if (ide_identify(&ide_devices[idx]) == 0) {
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found++;
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const char *class_name = (ide_devices[idx].type == IDE_TYPE_ATA)
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? "hdd" : "cd";
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const char *type_str = (ide_devices[idx].type == IDE_TYPE_ATA)
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? "ATA" : "ATAPI";
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offset_print(" IDE: ");
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offset_print(type_str);
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offset_print(" device on ");
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offset_print(ch == 0 ? "primary" : "secondary");
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offset_print(drv == 0 ? " master" : " slave");
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offset_print(": ");
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offset_print(ide_devices[idx].model);
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offset_print(" (");
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print_hex(ide_devices[idx].sector_count);
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offset_print(" sectors)\n");
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/* Register with devicefs */
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devicefs_register_block(class_name, &ide_block_ops,
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&ide_devices[idx]);
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}
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}
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}
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if (found == 0) {
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offset_print(" IDE: no devices found\n");
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} else {
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offset_print(" IDE: ");
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print_hex((uint32_t)found);
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offset_print(" device(s) found\n");
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}
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return 0;
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}
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int ide_init(void) {
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return ide_driver_init();
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}
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ide_device_t *ide_get_device(int index) {
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if (index < 0 || index >= IDE_MAX_DEVICES) return NULL;
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if (!ide_devices[index].present) return NULL;
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return &ide_devices[index];
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}
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/** IDE driver descriptor. */
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static const driver_t ide_driver = {
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.name = "ide",
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.probe = ide_probe,
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.init = ide_driver_init,
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};
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REGISTER_DRIVER(ide_driver);
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88
src/ide.h
Normal file
88
src/ide.h
Normal file
@@ -0,0 +1,88 @@
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/**
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* @file ide.h
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* @brief IDE/ATA disk driver.
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*
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* Enumerates IDE devices on the primary and secondary channels, identifies
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* ATA hard drives and ATAPI CD-ROMs, and registers them with the devicefs
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* subsystem as block devices (hddN / cdN).
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*/
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#ifndef IDE_H
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#define IDE_H
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#include <stdint.h>
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/** Maximum number of IDE devices (2 channels × 2 drives). */
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#define IDE_MAX_DEVICES 4
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/** IDE channel I/O port bases. */
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#define IDE_PRIMARY_IO 0x1F0
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#define IDE_PRIMARY_CTRL 0x3F6
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#define IDE_SECONDARY_IO 0x170
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#define IDE_SECONDARY_CTRL 0x376
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/** IDE register offsets from I/O base. */
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#define IDE_REG_DATA 0x00
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#define IDE_REG_ERROR 0x01
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#define IDE_REG_FEATURES 0x01
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#define IDE_REG_SECCOUNT 0x02
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#define IDE_REG_LBA_LO 0x03
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#define IDE_REG_LBA_MID 0x04
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#define IDE_REG_LBA_HI 0x05
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#define IDE_REG_DRIVE_HEAD 0x06
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#define IDE_REG_STATUS 0x07
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#define IDE_REG_COMMAND 0x07
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/** IDE status register bits. */
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#define IDE_STATUS_ERR 0x01 /**< Error occurred. */
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#define IDE_STATUS_DRQ 0x08 /**< Data request ready. */
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#define IDE_STATUS_SRV 0x10 /**< Overlapped mode service request. */
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#define IDE_STATUS_DF 0x20 /**< Drive fault. */
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#define IDE_STATUS_DRDY 0x40 /**< Drive ready. */
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#define IDE_STATUS_BSY 0x80 /**< Drive busy. */
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/** IDE commands. */
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#define IDE_CMD_IDENTIFY 0xEC /**< ATA IDENTIFY DEVICE. */
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#define IDE_CMD_IDENTIFY_PKT 0xA1 /**< ATAPI IDENTIFY PACKET DEVICE. */
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#define IDE_CMD_READ_PIO 0x20 /**< Read sectors (PIO, 28-bit LBA). */
|
||||
#define IDE_CMD_WRITE_PIO 0x30 /**< Write sectors (PIO, 28-bit LBA). */
|
||||
|
||||
/** IDE device types. */
|
||||
#define IDE_TYPE_NONE 0 /**< No device present. */
|
||||
#define IDE_TYPE_ATA 1 /**< ATA hard disk. */
|
||||
#define IDE_TYPE_ATAPI 2 /**< ATAPI CD/DVD drive. */
|
||||
|
||||
/**
|
||||
* IDE device descriptor.
|
||||
*/
|
||||
typedef struct ide_device {
|
||||
uint8_t present; /**< 1 if device is present. */
|
||||
uint8_t type; /**< IDE_TYPE_ATA or IDE_TYPE_ATAPI. */
|
||||
uint8_t channel; /**< 0 = primary, 1 = secondary. */
|
||||
uint8_t drive; /**< 0 = master, 1 = slave. */
|
||||
uint16_t io_base; /**< I/O base port for this channel. */
|
||||
uint16_t ctrl_base; /**< Control port for this channel. */
|
||||
uint32_t sector_count; /**< Total sectors (28-bit LBA max). */
|
||||
uint32_t sector_size; /**< Sector size in bytes (usually 512). */
|
||||
char model[41]; /**< Model string from IDENTIFY. */
|
||||
} ide_device_t;
|
||||
|
||||
/**
|
||||
* Initialize the IDE driver.
|
||||
*
|
||||
* Scans primary and secondary channels for ATA/ATAPI devices,
|
||||
* reads their IDENTIFY data, and registers them with devicefs.
|
||||
*
|
||||
* @return Number of devices found.
|
||||
*/
|
||||
int ide_init(void);
|
||||
|
||||
/**
|
||||
* Get an IDE device by index (0–3).
|
||||
*
|
||||
* @param index Device index.
|
||||
* @return Pointer to the device descriptor, or NULL if invalid/not present.
|
||||
*/
|
||||
ide_device_t *ide_get_device(int index);
|
||||
|
||||
#endif /* IDE_H */
|
||||
@@ -15,6 +15,18 @@ static inline uint8_t inb(uint16_t port)
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline void outw(uint16_t port, uint16_t val)
|
||||
{
|
||||
asm volatile ( "outw %w0, %w1" : : "a"(val), "Nd"(port) );
|
||||
}
|
||||
|
||||
static inline uint16_t inw(uint16_t port)
|
||||
{
|
||||
uint16_t ret;
|
||||
asm volatile ( "inw %w1, %w0" : "=a"(ret) : "Nd"(port) );
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline void io_wait(void)
|
||||
{
|
||||
/* Port 0x80 is used for 'checkpoints' during POST. */
|
||||
|
||||
Reference in New Issue
Block a user