f1923fdbcf
- Reworked IDT initialization to register all 32 CPU exception handlers (ISR 0-31) and 16 hardware interrupt handlers (IRQ 0-15, mapped to IDT entries 32-47). - Created assembly stubs in interrupts.S using macros for ISRs with and without error codes, plus IRQ stubs. All route through a common stub that saves registers, loads kernel data segment, and calls the C handler. - Added isr.c with a unified interrupt dispatcher that handles both exceptions (halts on fault) and hardware IRQs (sends EOI via PIC). - Implemented PIC (8259) driver in pic.c with full initialization sequence that remaps IRQ 0-7 to IDT 32-39 and IRQ 8-15 to IDT 40-47. Includes mask/unmask and EOI support. - Extracted port I/O primitives (inb, outb, io_wait) into port_io.h header for reuse across drivers. - Kernel now initializes PIC after IDT and enables interrupts with STI.
121 lines
2.0 KiB
ArmAsm
121 lines
2.0 KiB
ArmAsm
.section .text
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.global idt_load
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.type idt_load, @function
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idt_load:
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mov 4(%esp), %eax
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lidt (%eax)
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ret
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/* Common ISR stub */
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isr_common_stub:
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pusha
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/* Save segment registers */
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mov %ds, %ax
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push %eax
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/* Load kernel data segment */
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mov $0x10, %ax
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mov %ax, %ds
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mov %ax, %es
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mov %ax, %fs
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mov %ax, %gs
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/* Push pointer to stack structure as argument for C handler */
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push %esp
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call isr_handler
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add $4, %esp /* Clean up pushed pointer */
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/* Restore segment registers */
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pop %eax
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mov %eax, %ds
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mov %eax, %es
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mov %eax, %fs
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mov %eax, %gs
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popa
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add $8, %esp /* Cleans up error code and ISR number */
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iret
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/* Macro for exceptions with NO Error Code */
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.macro ISR_NOERRCODE num
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.global isr\num
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.type isr\num, @function
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isr\num:
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cli
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push $0
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push $\num
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jmp isr_common_stub
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.endm
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/* Macro for exceptions WITH Error Code */
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.macro ISR_ERRCODE num
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.global isr\num
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.type isr\num, @function
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isr\num:
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cli
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push $\num
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jmp isr_common_stub
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.endm
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ISR_NOERRCODE 0
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ISR_NOERRCODE 1
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ISR_NOERRCODE 2
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ISR_NOERRCODE 3
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ISR_NOERRCODE 4
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ISR_NOERRCODE 5
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ISR_NOERRCODE 6
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ISR_NOERRCODE 7
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ISR_ERRCODE 8
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ISR_NOERRCODE 9
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ISR_ERRCODE 10
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ISR_ERRCODE 11
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ISR_ERRCODE 12
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ISR_ERRCODE 13
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ISR_ERRCODE 14
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ISR_NOERRCODE 15
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ISR_NOERRCODE 16
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ISR_ERRCODE 17
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ISR_NOERRCODE 18
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ISR_NOERRCODE 19
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ISR_NOERRCODE 20
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ISR_NOERRCODE 21
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ISR_NOERRCODE 22
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ISR_NOERRCODE 23
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ISR_NOERRCODE 24
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ISR_NOERRCODE 25
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ISR_NOERRCODE 26
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ISR_NOERRCODE 27
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ISR_NOERRCODE 28
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ISR_NOERRCODE 29
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ISR_ERRCODE 30
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ISR_NOERRCODE 31
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/* Macro for IRQs (Hardware Interrupts) */
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.macro ISR_IRQ num, idt_index
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.global irq\num
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.type irq\num, @function
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irq\num:
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cli
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push $0
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push $\idt_index
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jmp isr_common_stub
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.endm
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/* Hardware Interrupts */
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ISR_IRQ 0, 32
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ISR_IRQ 1, 33
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ISR_IRQ 2, 34
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ISR_IRQ 3, 35
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ISR_IRQ 4, 36
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ISR_IRQ 5, 37
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ISR_IRQ 6, 38
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ISR_IRQ 7, 39
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ISR_IRQ 8, 40
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ISR_IRQ 9, 41
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ISR_IRQ 10, 42
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ISR_IRQ 11, 43
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ISR_IRQ 12, 44
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ISR_IRQ 13, 45
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ISR_IRQ 14, 46
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ISR_IRQ 15, 47
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