71e2ae482a
Add complete user-mode process support: - TSS (tss.c/h): Task State Segment for Ring 3->0 transitions, installed as GDT entry 5 (selector 0x28). ESP0 updated per-process for kernel stack switching. - Process management (process.c/h): Process table with up to 64 processes. process_create() clones kernel page directory, maps user code at 0x08048000 and user stack at 0xBFFFF000, copies flat binary code. Round-robin scheduler via schedule_tick() modifies the interrupt frame in-place for zero-copy context switching. - System calls (syscall.c/h): INT 0x80 dispatcher with 8 syscalls: SYS_EXIT, SYS_WRITE (to debug port + VGA), SYS_READ, SYS_FORK, SYS_GETPID, SYS_YIELD, SYS_WAITPID, SYS_EXEC. IDT gate at 0x80 uses DPL=3 (flags 0xEE) so user code can invoke it. - Assembly stubs (interrupts.S): isr128 for INT 0x80, tss_flush for loading the Task Register, enter_usermode for initial iret to Ring 3. - Paging extensions (paging.c/h): paging_clone_directory() to create per-process page directories, paging_map_page_in() for mapping into non-active directories, paging_switch_directory() for CR3 switching. - GDT expanded from 5 to 6 entries to accommodate TSS descriptor. gdt_set_gate() exposed in header for TSS initialization. - ISR handler routes timer IRQ (32) to scheduler and INT 0x80 to syscall dispatcher. Exception handler now prints EIP/CS/ERR for debugging. - Kernel boots a test user program that writes 'Hello from Ring 3!' via SYS_WRITE and exits with code 42 via SYS_EXIT. Verified working in QEMU. Context switching approach: Timer/syscall interrupts save all registers via the ISR stub. schedule_tick() copies saved_regs between PCBs and overwrites the interrupt frame, so the existing iret restores the next process's state without separate switch assembly.
64 lines
1.5 KiB
C
64 lines
1.5 KiB
C
/**
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* @file tss.h
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* @brief Task State Segment (TSS) definitions.
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*
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* The TSS is required by x86 for ring transitions. When a user-mode process
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* triggers an interrupt, the CPU loads the kernel stack pointer (SS0:ESP0)
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* from the TSS before pushing the interrupt frame.
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*/
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#ifndef TSS_H
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#define TSS_H
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#include <stdint.h>
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/**
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* x86 Task State Segment structure.
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* Only SS0 and ESP0 are actively used for ring 3 -> ring 0 transitions.
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*/
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typedef struct tss_entry {
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uint32_t prev_tss;
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uint32_t esp0; /**< Kernel stack pointer (loaded on ring transition). */
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uint32_t ss0; /**< Kernel stack segment (loaded on ring transition). */
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uint32_t esp1;
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uint32_t ss1;
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uint32_t esp2;
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uint32_t ss2;
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uint32_t cr3;
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uint32_t eip;
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uint32_t eflags;
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uint32_t eax;
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uint32_t ecx;
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uint32_t edx;
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uint32_t ebx;
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uint32_t esp;
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uint32_t ebp;
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uint32_t esi;
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uint32_t edi;
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uint32_t es;
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uint32_t cs;
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uint32_t ss;
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uint32_t ds;
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uint32_t fs;
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uint32_t gs;
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uint32_t ldt;
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uint16_t trap;
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uint16_t iomap_base;
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} __attribute__((packed)) tss_entry_t;
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/**
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* Initialize the TSS and install it as GDT entry 5 (selector 0x28).
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* Must be called after init_gdt().
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*/
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void init_tss(void);
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/**
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* Update the kernel stack pointer in the TSS.
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* Called during context switches to set the stack for the next process.
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*
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* @param esp0 The new kernel stack pointer.
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*/
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void tss_set_kernel_stack(uint32_t esp0);
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#endif /* TSS_H */
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