Implement ISR stubs and PIC driver for hardware interrupt handling (AI)

- Reworked IDT initialization to register all 32 CPU exception handlers (ISR 0-31)
  and 16 hardware interrupt handlers (IRQ 0-15, mapped to IDT entries 32-47).
- Created assembly stubs in interrupts.S using macros for ISRs with and without
  error codes, plus IRQ stubs. All route through a common stub that saves
  registers, loads kernel data segment, and calls the C handler.
- Added isr.c with a unified interrupt dispatcher that handles both exceptions
  (halts on fault) and hardware IRQs (sends EOI via PIC).
- Implemented PIC (8259) driver in pic.c with full initialization sequence that
  remaps IRQ 0-7 to IDT 32-39 and IRQ 8-15 to IDT 40-47. Includes mask/unmask
  and EOI support.
- Extracted port I/O primitives (inb, outb, io_wait) into port_io.h header for
  reuse across drivers.
- Kernel now initializes PIC after IDT and enables interrupts with STI.

This commit is contained in:

2026-02-23 10:51:45 +00:00

parent 3909a1f581

commit f1923fdbcf

9 changed files with 475 additions and 42 deletions

									
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src/CMakeLists.txt
									
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				@@ -5,6 +5,8 @@ add_executable(kernel

				    gdt_flush.S

				    gdt.c

				    idt.c

				    isr.c

				    pic.c

				    interrupts.S

				    kernel.c

				)

Implement ISR stubs and PIC driver for hardware interrupt handling (AI)

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src/CMakeLists.txt

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