Implement Ring 3 process subsystem with syscalls and context switching (AI)
Add complete user-mode process support: - TSS (tss.c/h): Task State Segment for Ring 3->0 transitions, installed as GDT entry 5 (selector 0x28). ESP0 updated per-process for kernel stack switching. - Process management (process.c/h): Process table with up to 64 processes. process_create() clones kernel page directory, maps user code at 0x08048000 and user stack at 0xBFFFF000, copies flat binary code. Round-robin scheduler via schedule_tick() modifies the interrupt frame in-place for zero-copy context switching. - System calls (syscall.c/h): INT 0x80 dispatcher with 8 syscalls: SYS_EXIT, SYS_WRITE (to debug port + VGA), SYS_READ, SYS_FORK, SYS_GETPID, SYS_YIELD, SYS_WAITPID, SYS_EXEC. IDT gate at 0x80 uses DPL=3 (flags 0xEE) so user code can invoke it. - Assembly stubs (interrupts.S): isr128 for INT 0x80, tss_flush for loading the Task Register, enter_usermode for initial iret to Ring 3. - Paging extensions (paging.c/h): paging_clone_directory() to create per-process page directories, paging_map_page_in() for mapping into non-active directories, paging_switch_directory() for CR3 switching. - GDT expanded from 5 to 6 entries to accommodate TSS descriptor. gdt_set_gate() exposed in header for TSS initialization. - ISR handler routes timer IRQ (32) to scheduler and INT 0x80 to syscall dispatcher. Exception handler now prints EIP/CS/ERR for debugging. - Kernel boots a test user program that writes 'Hello from Ring 3!' via SYS_WRITE and exits with code 42 via SYS_EXIT. Verified working in QEMU. Context switching approach: Timer/syscall interrupts save all registers via the ISR stub. schedule_tick() copies saved_regs between PCBs and overwrites the interrupt frame, so the existing iret restores the next process's state without separate switch assembly.
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AI
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docs/process.md
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docs/process.md
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# Process Subsystem
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## Overview
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The process subsystem enables user-mode (Ring 3) process execution on ClaudeOS.
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It provides process creation, context switching via the timer interrupt, and
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system calls via `INT 0x80`.
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## Architecture
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### Ring Transition
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x86 protected mode uses privilege rings 0–3. The kernel runs in Ring 0 (full
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hardware access) and user processes run in Ring 3 (restricted). The GDT
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defines segment descriptors for both:
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| GDT Entry | Selector | Purpose | DPL |
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|-----------|----------|-----------------|-----|
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| 0 | 0x00 | Null | – |
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| 1 | 0x08 | Kernel Code | 0 |
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| 2 | 0x10 | Kernel Data | 0 |
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| 3 | 0x18 | User Code | 3 |
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| 4 | 0x20 | User Data | 3 |
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| 5 | 0x28 | TSS | 0 |
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User-mode selectors include RPL=3: code = 0x1B, data = 0x23.
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### Task State Segment (TSS)
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The TSS (`tss.c`) stores the kernel stack pointer (SS0:ESP0) used when the CPU
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transitions from Ring 3 to Ring 0 on an interrupt. Before running each process,
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the scheduler updates TSS.ESP0 to that process's kernel stack top.
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### Memory Layout
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Each process gets its own page directory, cloned from the kernel's:
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```
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0x00000000 – 0x07FFFFFF : Identity-mapped (kernel/device access)
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0x08048000 – ... : User code (loaded from binary image)
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0xBFFF7000 – 0xBFFFF000 : User stack (2 pages, grows downward)
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0xD0000000 – 0xF0000000 : Kernel heap (shared across all processes)
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```
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### Process Control Block
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```c
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typedef struct process {
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uint32_t pid;
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process_state_t state; // UNUSED, READY, RUNNING, BLOCKED, ZOMBIE
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registers_t saved_regs; // Full interrupt frame
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uint32_t kernel_stack; // Base of per-process kernel stack
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uint32_t kernel_stack_top; // TSS ESP0 value
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uint32_t page_directory; // Physical address of page directory
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uint32_t user_stack; // User stack virtual address
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uint32_t entry_point; // User code entry point
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int32_t exit_code; // Set on exit
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uint32_t parent_pid;
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char name[32];
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} process_t;
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```
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## Context Switching
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Context switching uses the interrupt frame directly:
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1. Timer IRQ (or `INT 0x80` for SYS_YIELD) fires
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2. CPU pushes SS/ESP/EFLAGS/CS/EIP onto the process's kernel stack
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3. ISR stub pushes the rest (pusha + DS) forming a `registers_t`
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4. `schedule_tick()` is called with a pointer to these registers
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5. Current process's registers are saved into its PCB
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6. Next READY process's saved registers are written over the interrupt frame
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7. TSS.ESP0 is updated, CR3 is switched to the new page directory
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8. ISR stub restores the (now different) registers and `iret` enters the new
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process in user mode
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This avoids separate context-switch assembly — the existing ISR stub handles
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everything.
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## System Calls
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System calls use `INT 0x80` with the call number in EAX:
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| Number | Name | Arguments |
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|--------|-------------|------------------------------|
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| 0 | SYS_EXIT | EBX = exit code |
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| 1 | SYS_WRITE | EBX = fd, ECX = buf, EDX = len |
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| 2 | SYS_READ | (not implemented) |
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| 3 | SYS_FORK | (returns child PID/0) |
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| 4 | SYS_GETPID | (returns PID in EAX) |
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| 5 | SYS_YIELD | (voluntary preemption) |
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| 6 | SYS_WAITPID | EBX = child PID |
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| 7 | SYS_EXEC | (not implemented) |
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The INT 0x80 IDT gate has DPL=3 (flags 0xEE) so user-mode code can invoke it.
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## Initial Process Entry
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`process_run_first()` performs the initial transition to user mode using an
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`iret` instruction that sets up Ring 3 segment selectors, the user stack
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pointer, and the entry point. This is a one-way transition — the function
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does not return.
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## Files
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- `tss.h` / `tss.c` — TSS structure and initialization
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- `process.h` / `process.c` — Process table, creation, scheduling, exit, fork
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- `syscall.h` / `syscall.c` — System call dispatch and handlers
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- `interrupts.S` — Assembly stubs: `isr128` (INT 0x80), `tss_flush`, `enter_usermode`
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